View STV8203_215534.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STV8203
MULTISTANDARD TV SOUND DEMODULATOR
. . . . . . . . . . . . .
PRELIMINARY DATA
PERFORMS FM MONO, FM 2 CARRIERS AND NICAM RECEPTION B/D/G/H/I/K/K1/K2/L/L' UP TO 500kHz DEVIATION FM DEMODULATOR ALL PRE AND POST-PROCESSING INTEGRATED FILTERS, ALIGNMENT FREE STANDARD RECOGNITION FLAG SINGLE QUARTZ CRYSTAL I2C BUS CONTROLLED AM AND DOUBLE SCART AUDIO MATRIX STAND-BY WITH THRU MODE SINGLE BIT DACS EASY IMPLEMENTATION OF AUTOSTANDARD MODE ADVANCED OPERATING MODE FOR FULL CUSTOMIZATION SIF AGC WITH WIDE RANGE
SHRINK42 (Plastic Package) ORDER CODE : STV8203
DESCRIPTION The STV8203 provides all the necessary circuitry for demodulation of all Nicam and German stereo audio transmission. It is very suitable for TV applications as well as for VCR, Personal Computer or Set Top Box applications. Different transmission standardsare automaticallydetected and demodulated without user intervention. The recovered audio signals can be made available in analog form. More, the STV8203 integrates an audio matrix with a THRU mode when the IC is in stand-by. Very flexible applications are possible thanks to 2 smart I C program modes and large choice of appropriate audio processing ICs.
January 1999
This is advance information on a new product now in development or undergoing evaluatio n. Details are subject to change without notice.
TQFP44 (10 x 10 x 1.4mm) (Full Plastic Quad Flat Pack) ORDER CODE : STV8203D
1/31
STV8203
SDIP42 PIN CONNECTIONS
CAP5 SIF1 CAP6 SIF2 GND3 MOUT MIN CAP8 LIL1 LIR1 GND4 LIL2 LIR2 CAP2 CAP1 AOL1 AOR1 CAP4 AOL2 AOR2 AV CC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 GND2 DVDD5 REG CAP3 NC SCL SDA NOT USED XIN XOUT GND1 NC NC NC NC NC NC NC NC
8203-01.EPS
RESET CAP7
TQFP44 PIN CONNECTIONS
GND3 GND2 CAP6 CAP5 SIF2 SIF1 CAP3 DVDD5 REG NC 2 NC 1 44 43 42 41 40 39 38 37 36 35 34 23 24 25 26 27 28 29 30 31 32 33 SCL SDA NOT USED XIN XOUT GND1 NC NC NC NC NC
11 10 9 MOUT MIN CAP8 LIL1 LIR1 GND4 LIL2 LIR2 CAP2 CAP1 AOL1 12 13 14 15 16 17 18 19 20 21 22
8
7
6
5
4
3
2/31
8203-02.EPS
RESET
AOR1
AOR2
CAP4
CAP7
AOL2
NC
NC
NC
AVCC
NC
STV8203
PIN LIST
Pin Number SDIP42 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 TQFP44 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 1 2 3 4 5 6 Name CAP5 SIF1 CAP6 SIF2 GND3 MOUT MIN CAP8 LIL1 LIR1 GND4 LIL2 LIR2 CAP2 CAP1 AOL1 AOR1 CAP4 AOL2 AOR2 NC AVCC CAP7 RESET NC NC NC NC NC NC NC NC GND1 XOUT XIN Not used SDA SCL NC NC CAP3 REG DVDD5 GND2 Type Analog Analog Analog Analog Power Analog Analog Analog Analog Analog Power Analog Analog Analog Analog Analog Analog Analog Analog Analog Power Analog Input Power Analog Analog Input Bi-directional Input Analog Analog Power Power Function Decoupling for ADC Supply Regulator Output Subcarrier 1 Input Decoupling for Input Amplifier Reference Subcarrier 2 Input Ground for Input Amplifier Mono Audio Output Mono Audio Input ADC Vtop Decoupling Line 1 Left Input (SCART 1) Line 1 Right Input (SCART 1) Audio Ground Line 2 Left Input (SCART 2) Line 2 Right Input (SCART 2) Decoupling for Audio Matrix Decoupling for Bandgap Reference Line 1 Left Output (SCART 1) Line 1 Right Output (SCART 1) Audio Matrix VDD (5V) Line 2 Left Output (SCART 2) Line 2 Right Output (SCART 2) Not Connected Audio Matrix Supply Decoupling for Digital Regulator Output Power On Reset Not Connected Not Connected Not Connected Not Connected Not Connected Not Connected Not Connected Not Connected Digital Ground Crystal Oscillator Output Crystal Oscillator Input To be connected to ground I2C Serial Data I2C Serial Clock Not Connected Not Connected Decoupling for Digital 3V (regulator output) Base Drive for External Regulator Transistor 5V Supply Digital Ground
8203-01.TBL
3/31
STV8203
BLOCK DIAGRAM
I2C BUS INTERFACE FM / NICAM DEMODULATOR CORE * SDA SCL
SIF1 SIF2
ANALOG SWITCH
AGC
Sub IN
XTAL
CRYSTAL OSCILLATOR
2 2 AUDIO MATRIX 2 2 2 L1, R1 (L1 + R1)/2 2VRMS 2VRMS SCART1 OUT L SCART1 OUT R SCART2 OUT L SCART2 OUT R 1VRMS MONO OUT
DVDD5 AVCC
POWER SUPPLY REGULATORS
Digital Analog PRE-SCALING
STV8203
SCART1 IN L SCART1 IN R SCART2 IN L SCART2 IN R MONO IN
* See Demodulator Core Block Diagram
DEMODULATOR CORE BLOCK DIAGRAM
SIGNAL SHAPING Sub IN PRE-SCALING ONE BIT SIGMA DELTA DAC
BAND PASS
NOISE * ESTIMATION
LEVEL * ESTIMATOR
SOUND STANDARD MANAGEMENT IDENTIFICATION, CHANNEL CONTROL, MUTE, ...
DIGITAL CHANNEL MATRIX AND AUTOSWITCH
ADC
FM DISCRIMINATOR
Channel 1
I2C Bus
PILOT * RECOGNITION
NOISE * ESTIMATION
PRE-SCALING
SIGNAL SHAPING
BAND PASS
FM DISCRIMINATOR
ONE BIT SIGMA DELTA DAC
Channel 2
* Data also available throught I 2C Bus
4/31
8203-04.EPS
NICAM QPSK AND DECODER
QPSK LOCK * DETECTION
BIT ERROR RATE *
8203-03.EPS
STV8203
FUNCTIONAL DESCRIPTION As can be seen from the block diagram, the input to the demodulator section is selectable from one of two I.F. sources via the I2C bus. The selected signal is then passed through an AGC block, having a range of 28dB, before being digitised in the ADC unit. A single quartz crystal (suggestedvalue : between 24.712MHzand 27MHz) is used for the all thedigital processing,includingdemodulation,identification, control, filtering. This has the advantage of a singleclock signalsource for the wholeIC which eliminates problems of multiple clock. The single clock can be chosen to minimize interference in the TV IF and RF stages of the tuner system. The demodulatorsystem can identify and demodulate all the standarddescribedin the Table1. Theresult of the recognition is flagged up to the host system via the I2C bus communication system. In the case of NICAM transmissions, in the event of a failure of the received signal or a degradation of the bit error rate (BER) below a prescribed level, the system will automaticallydefault to the reserve sound transmission on mono FM or AM. For FM demodulation, the discriminator can normallyhandle signals having 250kHz deviation.This covers all European standards, and ensure an optimized compromise for the signal to noise ratio in one hand, and overmodulation in the other hand. However, it is possible to extand the deviation range up to 500kHz (I2C programmable) in order to cover requests of some broadcasters. Fully automatic standard recognition and setting can be achieve using simple routines. Figure 1 : Audio Matrix
DAC LI2(SCART2) MIN 2 2 S1 GAIN 6dB S2 LI1(SCART1) 2 MUTE L2/R2 2 MUTE MUTE L1/R1 L1, R1, (L1 + R1)/2 SELECTOR 2 AO1(SCART1) MOUT
8203-05.EPS
Appropriate de-emphasis networks in the digital domain are applied to the resulting demodulated signals (50s, J17), followed by dematrixing if required. The digital datastream is then passed through 2 x 16bits DACs before the audio matrix. All this first section is working at 3.3V thanks to an integrated voltage regulator. In stand-by mode, the voltage regulator pulls the voltage down to zero, ensuring no power dissipation in this part. An audio matrix allows the selection of inputs applied on the outputsSCART1, SCART2 and MONO according to the diagram shown in Figure 1. The "MOUT" outputs either the signal L1, or R1 or (L1+R1)/2. This allows to record the selected channel in mono mode, for example on the linear channel of a VCR simultanously with the stereo mode. Maximum output swing is 1VRMS. The audio matrix section has its own power supply regulator, allowing to keep this part working even when the rest is in stand-by mode. This achieves a "THRU" mode from input "SCART1" to output "SCART2" andinput"SCART2" to output"SCART1". The maximum output swing of both SCART1 and SCART2 is 2VRMS. Remark : Circuit operation is possible with only a single 5V supply. In this case, the AVCC supply pin is connected to 5V. Maximum output swing is then limited to 1VRMS and a 6dB attenuationis automatically added to the DAC output. In that case, the resistor shown as R2 = 39 in the ApplicationDiagram (between Pin 8 and Pin 21) must be replace by a short circuit to avoid clipping.
AO2(SCART2)
5/31
STV8203
FUNCTIONAL DESCRIPTION (continued) Table 1 : Demodulated TV Sound Norms
System Sound Type FM mono B/G B/H D/K D/K1 D/K2 I L M/N FM/NICAM FM 2 carriers FM/NICAM FM mono FM/NICAM FM 2 carriers FM 2 carriers FM/NICAM FM mono NICAM FM mono A2* A2 FM Deviation (kHz) Type Carrier 1 Carrier 2 Name (kHz) (kHz) Nom. Max. Over 5.5 5.5 5.5 5.5 6.5 6.5 6.5 6.5 6.0 6.0 6.5 (1) 4.5 (2) 5.850 15 25 50 5.850 6.258 6.742 6.552 27 50 80 27 50 80 J17 50s 50s J17 50s J17 (2) 40 100 40 54.6875 54.6875 5.850 5.742 5.850 27 27 27 50 50 50 80 80 80 J17 50s J17 40 40 54.6875 Deemphasis Roll-off Pilot Frequency (kHz)
Notes : 1. STV8203 performs only limited AM demodulation. Report to Application Note. 2. 50s only, instead of 75s.
6/31
STV8203
USING STV8203 1 - Hardware 1.a - Power Supplies (see Figure 2) The IC is using two main power supplies : - DVDD5 supplies all the digital part VNom. = 5V. This power supply can be switched-off in standby mode. - AVCC supplies the audio matrixpart : if VNom. = 8V then the output voltage swing on output pins can reach 2VRMS, if VNom. = 5V then the output voltage swing on output pins can reach 1VRMS. Figure 2
DVDD5 41 DEMODULATION AND CONTROL PART Pins 5-32-42 GND AVCC 21 AUDIO MATRIX GND
8203-06.EPS
between stereo or mono signals in the playback mode in case of marginal noise conditions. 1.d - Stand-by Stand-by with THRU mode : the analog part of the device has its own power supply (AVCC) allowing this part to keep working even when the digital part, powered by the 5V power supply (DVDD5), is in stand-by. In this case, the audio matrix is put in a special setting : - LIL1 to AOL2, - LIR1 to AOR2, - LIL2 to AOL1, - LIR2 to AOR1, - input gain = 0dB. This allows to achieve a "THRU" mode from SCART1 input to SCART2 output and SCART2 input to SCART1 output, providing a copy facility from SCARTIN to SCARTOUT. 2 - Software Two modes of operation are available :
11
1.b - Sound Subcarrier Filters Sound demodulation and decoding are very easy with thisdevice providing all the necessaryfunctions for that purpose, including the channel filters. TheseFIR base-bandfilters give the best selectivity of the desired channeland providesin NICAM mode the correct cosine roll-off response. This implies that no external filters are required (except may be a simple high-pass filter, if the saw filters and sound IF demodulators used in the application create picture interferences). The filters can be automatically set for B/G/H/I/L/L' standards. They can also be easily tuned through I2C for M, D, K, K1. 1.c - Audio Matrix The mono output (MOUT) can output L1, R1 or (L1+R1)/2 signal. A typical application is the possibility to record a selected channel in mono mode on the lineartrack of a VCR separatelyfrom the recording ofthe stereo signal,providingthe facility to select
2.a - Optimized Program Mode Four standards have default setting stored in order to allow a very easy programmation. Only some registers may have to be programmed (these registers are shown in bold in the Figure 3) but in most cases, the reset values will be sufficient. In Figure 3, CTL and STAT represent registers which are controlled by the "standard processor". These registers are located between address 23Hex and 3CHex in the complete list of registers. 2.b - Advanced Operation Mode In that mode, all the read/write registers (as mentionned in the complete list) can be programmed manually and changed from their reset values. The additionnal registers accessible in this mode are shown in bold in Figure 4. This mode can be selected by putting the bits [3:0] of AO-CONTROL register to 0.
7/31
STV8203
USING STV8203 (continued) Figure 3 : Optimized Program Mode
CH1 IF1 IF2 INPUT SWITCH AGC ADC CHANNEL FILTER FIR1 PLL DEMODULATOR FM STAT AUDIO MATRIX
PRE-LINE-IN
LEVEL DETECTOR DCO COARSE
CTL DCO FINE
ZWEITON
CETH1 - SQTH1
PRE-LINE-IN AUD-MX-CNT
STAT
AGCC AGCS AO-STAT0 AO-STAT1 AO-STAT2
CTL
CTL
ZWEITON DETECTOR
FM PRESCALE SWITCH DE-MATRIX DE-EMPHASIS
CTL STAT AUTO STANDARD CTL CH2 CHANNEL FILTER FIR2
PRE-FM
AGC INPUT
CETH2 SQTH2
PLL DEMODULATOR FM/QPSK
STAT
To DAC's
AO-CONTROL AO-TIMEOUT
CTL DCO COARSE DCO FINE CLOCK CONTROL
NICON
NICAM DECODER
NICAM PRESCALE
STAT CTL CTL
PRE-NICAM
CTL
Figure 4 : Advanced Operation Mode
STAT(2) CH1 IF1 IF2 INPUT SWITCH AGC ADC CHANNEL FILTER FIR1
PLL DEMODULATOR FM
CRF1
AUDIO MATRIX
PRE-LINE-IN
LEVEL DETECTOR DCO COARSE
FIR1CO-7
CETH1 - SQTH1 ACOEFF1 - BCOEFF1 STAT(2)
FMDC1/2
PRE-LINE-IN AUD-MX-CNT STAT(1)
AGCC AGCS
AO-STAT0 AO-STAT1 AO-STAT2
DCO FINE ZWEITON
IAGCR IAGCC
COFQ1
FIFQ1
ZWEITON DETECTOR STAT(2)
FM PRESCALE SWITCH DE-MATRIX DE-EMPHASIS
STAT (1), (2) or (3)
AUTO STANDARD
CTL
CH2
CHANNEL FILTER FIR2
PRE-FM AGC INPUT PLL DEMODULATOR FM/QPSK
CRF2
To DAC's
AO-CONTROL AO-TIMEOUT
FFFIXL FFFIXH FCFIX FIR2CO-7
STAT(3)
IAGCS SRF
CLOCK CONTROL
DCO COARSE
DCO FINE
CETH2 SQTH2 ACOEFF2 BCOEFF2 SCOEFF
NICAM DECODER
NICAM PRESCALE
(1) Bits in AO-STAT0 (2) Bits in AO-STAT1 (3) Bits in AO-STAT2
COFQ2
FIFQ2
8/31
8203-08.EPS
NICON
ERRCOUNT
PRE-NICAM
STD-CT-IIS
8203-07.EPS
STV8203
USING STV8203 (continued) 3 - Example of Applications
3.a - Very Low Cost TV Application
Figure 5
I2C Control
TUNER 1 QSS I.F.
MULTISTANDARD SOUND PROCESSOR STV8203
AUDIO AMPLIFIER TDA7495
2 x 7W
AM DEMODULATOR
8203-09.EPS
SCART1
SCART2
3.b - High-End TV Application
Figure 6
I2C Control
TUNER 1 QSS I.F. TUNER 2 QSS I.F.
R MULTISTANDARD SOUND PROCESSOR STV8203 AUDIO PROCESSOR SURROUND/KARAOKE SRS TDA7466 2 x 25W L
AM DEMODULATOR
3.c - TV Application in PC
Figure 7
I2C Control
TUNER 1 QSS I.F. TUNER 2 QSS I.F. AM DEMODULATOR
MULTISTANDARD SOUND PROCESSOR STV8203
AUDIO AMPLIFIER TDA7495
I2S Bus
Analog Audio Out
9/31
8203-11.EPS
8203-10.EPS
SCART1
SCART2
STV8203
ABSOLUTE MAXIMUM RATINGS
Symbol AV DD5 DVDD5 AVCC P tot Toper Tstg Analog Supply Voltage Digital Supply Voltage Scart Interface Supply Voltage Power Total Dissipation Operating Temperature Storage Temperature Parameter Value 7 7 9.5 0.8 0, +70 -20, +150 Unit V V V W
o o
C C
THERMAL DATA
Symbol R th (j-p) Parameter Junction to Pins Thermal Resistance Max. SDIP42 TQFP44 Value 55 68 Unit C/W C/W
8203-03.TBL 8203-05.TBL 8203-04.TBL
RECOMMENDED OPERATING CONDITIONS
Symbol AV DD5 DVDD5 AVCC Analog VDD Digital VDD Audio Interface Supply for 2VRMS outputs for 1VRMS outputs Parameter Min. 4.75 4.75 7.6 4.75 Typ. 5.0 5.0 8.0 5.0 Max. 5.25 5.25 8.4 5.25 Unit V V V V
ELECTRICAL CHARACTERISTICS (Tamb = 25oC, unless otherwise specified)
Symbol GENERAL IAIN IDIN IF INPUTS RIN CIN SWISO SIF FR VIN (Min.) VIN (Max.) AGC Input Resistance Input Capacitance Switch Isolation Input Frequency Range Minimum Input Level Maximum Input Level AGC Range f = 10MHz For FM demodulation 4 25 630 28 6 10 40 8 k pF dB MHz mVRMS mVRMS dB Input Current on AVCC AVCC = 5V AVCC = 8V DVDD5 = 5V 58 75 120 mA mA mA Parameter Test Conditions Min. Typ. Max. Unit
10/31
8203-02.TBL
STV8203
ELECTRICAL CHARACTERISTICS (Tamb = 25oC, unless otherwise specified) (continued)
Symbol Parameter Test Conditions Min. Typ. Max. Unit FM DEMODULATION PATH (see Figure 8) fRESP SNR FM THD FM SEP FM AMR VFMOUT Frequency Response Signal to Noise Total Harmonic Distortion German Stereo Channel Separation AM Rejection Maximum Output Swing SIF = 100mVRMS 30% modulation @ 1kHz 20Hz - 15kHz 100mVRMS, unweighted 20Hz-15kHz, Output 2VRMS @ 1kHz Output signal 1VRMS @ 1kHz, 50kHz FM deviation 40 60 2 -1.0 65 0.2 +1.0 dB dB % dB dB VRMS
NICAM DEMODULATION PATH (see Figure 8) SNR NIC Signal to Noise THD NIC Total Harmonic Distortion VNICOUT Maximum Output Swing 60 SEP NIC Channel Separation AUDIO MATRIX (see Figure 9) RIN VCL GMAT R OUT SNR XLR X12 Output Resistance Signal to Noise Ratio Audio L to R Channel Crosstalk Audio Crosstalk from Channel 1 to Channel 2 2VRMS @ 1kHz Input Resistance Input Clipping Level AVCC = 8V AVCC = 5V Prescaling = 0 VIN = 1VRMS, 15Hz to 15kHz All audio output except Mono output Mono output Preline in = 0, VOUT = 2VRMS, unweighted 20Hz-15kHz 60 80 2 1 -0.5 0 200 400 90 0.5 30 k VRMS VRMS dB dB
8203-06.TBL 8203-13.EPS 8203-12.EPS
100mVRMS, unweighted 20Hz-15kHz, Output 2VRMS @ 1kHz Output signal 1VRMS @ 1kHz
72 0.07 2
dB % VRMS dB
dB dB
Figure 8 : SynopticA
Analog Switch SIF1 DIGITAL DEMODULATATION DAC AOL1 or AOR1
STV8203
Figure 8 : SynopticA
STV8203
AIL1 or 2 or AIR1 or 2
Analog Switch AOL1 or 2 or AOR1 or 2
11/31
STV8203
PROGRAMMING THE DEVICE 1 - I2C Address and Protocol
Write
S 80 A SUB-ADDRESS A DATA A DATA A P
Read
S 80 A SUB-ADDRESS A P S 81 A DATA A DATA N
S = Start, A = Acknowledge, P = Stop, N = No acknowledge. Sub-address is the register address pointer ; this value auto-increments for both write and read. 2 - List of Registers
Registers not controlled by AUTOSTANDARD, except bits marked "*" which are controlled
Name Addr. (Hex) 2 3 4 5 6 7 8 9 A B C D E F 10 Reset (Bin) 0001 1101 0001 1101 0001 1000 read only read only 0000 1000 0010 0010 0000 0000 read only read only read only read only 0001 1111 1010 0101 1000 1000 bit 7 0 0 0 bit 6 0 0 0 Register Function /Description bit 5 bit 4 bit 3 bit 2 0 0 gain bit 1 bit 0
SWD (Switch, Dematrix & De-emphasis) PRE-FM PRE-NICAM STD-CT-IIS FMDC1 FMDC2 AUDIO MATRIX PRE-LINE-IN AUD-MX-CNT NICAM NICON ERR-COUNT AUTOSTANDARD AO-STAT0 AO-STAT1 AO-STAT2 AO-CONTROL AO-TIMEOUT ZWEITON ZWEITON DEMODULATOR AGCC 11 0001 0001 agc-cmd* AGCS 12 0100 00xx 0 IAGCR 14 1000 1000 IAGCC 15 0000 0011 iagc-off* IAGCS 16 read only FFFIXL 17 0000 0000 FFFIXH 18 0110 1110 0 FCFIX 19 0001 0001 0 CRF2 20 0000 0000 CETH2 21 0011 0101 SQTH2 22 0011 1100 Range of Registers Controlled by AUTOSTANDARD CRF1 3D 0000 0000 CETH1 3E 0011 0101 SQTH1 3F 0011 1100 12/31 agc-ref [2:0] agc-cst[1:0] agc-err [4:0] sig-ovr sig-und Iagc-ref [7:0] 0 0 0 0 Iagc-cst[2:0] Iagc-Ctrl [7:0] Clock Generator Fine Frequency (8 lsb's) demod mode M2:M0* clock gen fine freq (4 msb's) 0 Clock Generator Coarse Frequency Channel 2 Carrier Recovery Frequency Channel 2 carrier-th [7:0] Channel 2 squelch-th [7:0] Function (address 23 Hex to 3C Hex) Channel 1 Carrier Recovery Frequency Channel 1 carrier-th [7:0] Channel 1 squelch-th [7:0] 0 0 Thresh-Sig [3:0] Thresh-ST [3:0] std-det sid1 sid0 aomute fm2-car fm2-sq fm1-car fm1-sq nic-det f-mute LOA mute ov mono ov unmute C4 ov Time 2 setting (1280ms) am-mono SWD [2:0] (monitor) qpsk-lk zw-det zw-st zw-dm Nicam CBI [4:1] n-mute standard check [3:0] Time 1 setting (160ms) dif-pol 0 TSCTRL [1:0] ECT error [7:0] MAE 0 0 IF Switch mout1 AGC 0 Switch off S1 o/p select 0 Line Inputs Gain [3:0] mout0 S2 o/p select Fm Prescale [4:0] Nicam Prescale [4:0] demoff mute * SWD [2:0] * FM DC level 1 FM DC level 2
STV8203
PROGRAMMING THE DEVICE (continued)
Registers controllable by AUTOSTANDARD
Name Addr. (Hex) Reset (Bin) Register Function/Description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
DEMODULATOR CHANNEL 2 FIR2CO FIR2C1 FIR2C2 FIR2C3 FIR2C4 FIR2C5 FIR2C6 FIR2C7 COFQ2 FIFQ2 ACOEFF2 BCOEFF2 SCOEFF SRF 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 0000 0000 0000 0000 0000 0000 0000 0000 1111 1111 0000 0100 0001 0100 0010 0101 0000 1100 1100 0100 1001 0000 1010 1100 0001 1100 0000 0000 dmd sw2 sat sw2 dmx-of 0 0 0 0 0 FIR2 coefficient 0 FIR2 coefficient 1 FIR2 coefficient 2 FIR2 coefficient 3 FIR2 coefficient 4 FIR2 coefficient 5 FIR2 coefficient 6 FIR2 coefficient 7 Channel 2 DCO Coarse Frequency Channel 2 DCO Fine Frequency (8lsb's) Coarse A2 dco2 gain plf_A Symbol Recovery Frequency Sign A2 Fine A2 B2 plf_B
DEMODULATOR CHANNEL 1 FIR1CO FIR1C1 FIR1C2 FIR1C3 FIR1C4 FIR1C5 FIR1C6 FIR1C7 COFQ1 FIFQ1 ACOEFF1 BCOEFF1 31 32 33 34 35 36 37 38 39 3A 3B 3C 0000 0000 1111 1110 1111 1100 1111 1101 0000 0010 0000 1101 0001 1000 0001 1111 0000 1011 1100 0111 0010 0011 0001 0010 dmd sw1 sat-sw1 0 0 0 0 FIR1 coefficient 0 FIR1 coefficient 1 FIR1 coefficient 2 FIR1 coefficient 3 FIR1 coefficient 4 FIR1 coefficient 5 FIR1 coefficient 6 FIR1 coefficient 7 Channel 1 DCO Coarse Frequency Channel 1 DCO Fine Frequency (8lsb's) Coarse A1 dco1 gain Sign A1 Fine A1 B1
Note : This register must be kept to "0".
RESERVED 1 00000000 0 0 0 0 0 0 0 0
13/31
STV8203
PROGRAMMING THE DEVICE (continued) 3 - Register Description 3.1 - Registers Not Controlled By Autostandard (except some mentioned bits)
PRE-FM (Prescale FM Level) Address : 02 Type : R/W Reset : 0001 1101
bit 7 0 bit 6 0 bit 5 0 bit 4 bit 3 bit 2 FM PRESCALE bit 1 bit 0
FM PRESCALE : 00000 0dB 01100 +12dB 10100 -12dB (step size = 1dB, range = 12dB in 2's complement) Sets the reference level for an FM signal. Note, this is also dependant on the PLL programming. For example, with default settings for the PLL, an FM deviation of 27kHz will result in a signal 17dB below full scale before de-emphasis. At 1kHz, the internal de-emphasisgain is 14dB giving a level of -3dB. Full scale output from the DAC is 2VRMS corresponding to 0dB. and so for 1VRMS, PRE-FM should be set to -3dB.
PRE-NICAM (Prescale NICAM Level) Address : 03 Type : R/W Reset : 0001 1101
bit 7 0 bit 6 0 bit 5 0 bit 4 bit 3 bit 2 NICAM PRESCALE bit 1 bit 0
NICAM PRESCALE : 00000 0dB 01100 +12dB 10100 -12dB (step size = 1dB, range = 12dB in 2's complement) Sets the reference level for a NICAM signal. For example, a full scale NICAM signal at 1kHz would be received at -12dB before de-emphasis. Internal de-emphasis gain at this frequency is 9dB so for 1VRMS, pre-nicam should be set to -3dB.
14/31
STV8203
PROGRAMMING THE DEVICE (continued)
STD-CT-IIS (SWD Control) Address : 04 Type : R/W Reset : 0001 1000
bit 7 0 bit 6 0 bit 5 GAIN bit 4 DEMOFF bit 3 MUTE bit 2 bit 1 SWD bit 0
GAIN
DEMOFF MUTE SWD
: which should normally be set to its default value, can be used to change the dematrix gain for CH1 = L+R. dematrix gain : 0 : channel 1 = L/2+R/2, 1 : channel 1 = L+R : bypasses the FM or Nicam de-emphasis : 1 = de-emphasis off : mutes the DAC (FM or Nicam) : 1 = DAC muted (only effective if the AUTOSTANDARD function is off) : Bits allow control of the mode of the switch/dematrix function as shown below. (only effective if the AUTOSTANDARD function is off)
[2:0] 000 001 010 De-emphasis Description FM CH1 mono Zweiton mono Zweiton dual mono NICON[1:0] X X 00 01 10 11 X not used X 00 01 10 11 X Left D1 D1 D1 D2 D1 D2 DSL N1 N1 N2 N1 N2 NSL Right D1 D1 D2 D2 D1 D1 DSR N1 N2 N2 N1 N1 NSR
50s
011 100 101 110 J17
Zweiton stereo Nicam mono Nicam dual mono
111
Nicam stereo
D1 = FM audio from CH1, D2 = FM audio from CH2, DS = dematrixed Zweiton stereo. N1 = Nicam M1, N2 = Nicam M2, NS = Nicam stereo. These bits are controlled by AUTOSTANDARD when this function is activated.
FMDC1, FMDC2 (FM DC Level) Address : 05-06 Type :R
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FM DC LEVEL 1 OR FM DC LEVEL 2
FM Frequency offset (dependent on the PLL coefficients). This value (2's complement) is proportional to the DC offset, measured below 20Hz, of an FM signal. It could be used to implement an AFC for FM signals.
15/31
STV8203
PROGRAMMING THE DEVICE (continued)
PRE-LINE-IN (IF Input Selection and Audio Matrix Gain Control) Address : 07 Type : R/W Reset : 0000 1000
bit 7 IF SWITCH bit 6 AGC SWITCH OFF bit 5 0 bit 4 0 bit 3 bit 2 bit 1 bit 0 LINE INPUTS GAIN
IF SWITCH
: IF Input Switch controls the IF input selection (0 = IF1). AGC SWITCH OFF : can be used to switch-off the AGC amplifier.. LINE INPUTS GAIN : allow the levels of the analog line inputs (SCART1, SCART2 and MONO) to be adjusted simultaneously. 1000 0dB (default setting) 0010 -6dB 1110 +6dB (step size = 1dB, range = 6dB)
AUD-MX-CNT (Audio Matrix Control) Address : 08 Type : R/W Reset : 0010 0010
bit 7 MOUT1 bit 6 bit 5 S1 O/P SELECT bit 4 bit 3 MOUT0 bit 2 bit 1 S2 O/P SELECT bit 0
These 8 bits are used to control the audio matrix configuration (see Figure 1).
7 X X X X X X X X X X X X X X X X 0 0 1 1 6 X X X X X X X X 0 0 0 0 1 1 1 1 X X X X 5 X X X X X X X X 0 0 1 1 0 0 1 1 X X X X Data bits 4 3 X X X X X X X X X X X X X X X X 0 X 1 X 0 X 1 X 0 X 1 X 0 X 1 X X 0 X 1 X 0 X 1 2 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 1 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 0 1 0 1 0 1 0 1 X X X X X X X X X X X X Actual Function Selected Reset : AO1 and AO2 = DAC and MOUT = (L1+R1)/2 AO2 = Muted AO2 = Muted AO2 = AO1 (reset state) AO2 = LI1 (Scart 1 input) AO2 = Muted AO2 = Muted AO2 = Muted AO2 = Muted AO1 = Muted AO1 = MIN AO1 = DAC (reset state) AO1 = Muted AO1 = LI2 (Scart 2 input) AO1 = Muted AO1 = Muted AO1 = Muted MOUT = (L1+R1)/2 (reset state) MOUT = R1 MOUT = L1 Not used
16/31
STV8203
PROGRAMMING THE DEVICE (continued)
NICON (NICAM Control) Address : 09 Type : R/W Reset : 0000 0000
bit 7 DIF-POL bit 6 0 bit 5 TSCTRL bit 4 bit 3 ECT bit 2 MAE bit 1 0 bit 0 0
DIF-POL TSCTRL
: controls the polarity of the Q channel in the DQPSK decoder. Its default value is correct for Nicam B/G/L and so does not need to be changed. : These two bits are programmed to chose the decision mode for the zweiton detector as following : 00 : 2 decisions with 1024 samples accumulation 01 : 3 decisions with 1024 samples accumulation 10 : 2 decisions with 2048 samples accumulation 11 : 3 decisions with 2048 samples accumulation : bit error rate counting time : 0 = 128ms, 1 = 64ms : max allowed errors : 0 = 511, 1 = 255 Bits 2 and 3 adjust the bit error rate (approximate) at which the Nicam decoder mutes; a fixed hysteresis is provided so that the decoder will unmute only when the BER has dropped to one quarter of that for muting :
ECT 0 0 1 1 MAE 0 1 0 1 BER Muting Threshold 1 in 112 1 in 224 1 in 56 1 in 112
ECT MAE
ERR-COUNT (Nicam Error Counter) Address : 0A Type :R
bit 7 bit 6 bit 5 bit 4 ERROR bit 3 bit 2 bit 1 bit 0
Error Signals Count (averaged over time ECT above) The value in this register, updated every 64ms or 128ms, gives an indication of the Nicam bit error rate. It can therefore be used to mute the decoder at an error rate below 1 in 56 (=FF if ECT= 64ms).
17/31
STV8203
PROGRAMMING THE DEVICE (continued)
AO-STAT0 (AUTOSTANDARD Status 0) Address : 0B Type :R
bit 7 STD-DET bit 6 SID1 bit 5 SID0 bit 4 AOMUTE bit 3 AM-MONO bit 2 bit 1 SWD (MONITOR) bit 0
STD-DET
: Standard Detection : 0 = no standard detected 1 = indicates that an expected standard has been identified. : Standard Identification of the demodulator input indicate the standard which has been identified :
SID[1:0] 00 01 10 11 Standard I FM/NICAM B/G FM - Zweiton B/G FM/NICAM L/L' AM/NICAM
SID [1:0]
AOMUTE
AM-MONO SWD
: Audio Output Mute indicates that the audio outputs are muted (=1); only when the demodulator is selected as audio source. This would be the case during standard search or no signal found. : AM selected indicates if the AM input (MIN) has been selected (=1); normally used for system L. : Switch Dematrix Mode indicate the setting of the SWD block :
SWD[2:0] 000 001 010 011 100 101 110 111 Mode description FM CH1 mono Zweiton mono (CH1) Zweiton dual mono Zweiton stereo Unused NICAM mono NICAM dual mono NICAM stereo De-emphasis 50s
Unused J-17
AO-STAT1 (AUTOSTANDARD Status 1 ; demodulator signal detectors) Address : 0C Type :R
bit 7 FM2-CAR bit 6 FM2-SQ bit 5 FM1-CAR bit 4 FM1-SQ bit 3 QPSK-LK bit 2 ZW-DET bit 1 ZW-ST bit 0 ZW-DM
FM2-CAR : FM2 Carrier Detector Lock FM2-SQ : FM2 Squelch Detector Lock FM1-CAR : FM1 Carrier Detector Lock FM1-SQ : FM1 Squelch Detector Lock QPSK-LK : QPSK Lock ZW-DET : Zweiton Pilot Lock ZW-ST : Zweiton Stereo Lock ZW-DM : Zweiton Dual Mono Lock This register allows direct access to the demodulator signal detectors ; 1 = detected.
18/31
STV8203
PROGRAMMING THE DEVICE (continued)
AO-STAT2 (AUTOSTANDARD Status 2 ; NICAM) Address : 0D Type :R
bit 7 NIC-DET bit 6 F-MUTE bit 5 LOA bit 4 bit 3 bit 2 bit 1 bit 0 N-MUTE NICAM CBI
NIC-DET F-MUTE LOA
NICAM CBI
: NICAM detected indicates a valid NICAM signal found (1 = detected). : Frame Mute indicates the NICAM decoder is muted because the superframe alignment has been lost. : Loss of frame Alignment word indicates loss of alignment to the frame alignment word in the NICAM decoder; the bit error rate is too high or no signal is present. : indicates the received NICAM control bits with the following interpretation :
CBI[4:1] X000 X001 X010 X011 X1XX 0XXX 1XXX Nicam Signal Description Stereo ch1 = mono, ch2 = data Dual Mono 704Kbit/s data FM selected during additional coding options Nicam different to FM mono Nicam mono(M1) or stereo = FM mono
N-MUTE
: NICAM Mute indicates that the NICAM decoder is muted (it may be unmuted by AO-CONTROL bit 5).
19/31
STV8203
PROGRAMMING THE DEVICE (continued)
AO-CONTROL (AUTOSTANDARD Control) Address : 0E Type : R/W Reset : 0001 1111
bit 7 MUTE OV bit 6 MONO OV bit 5 UNMUTE bit 4 C4 OV bit 3 bit 2 bit 1 STANDARD CHECK bit 0
AUTOSTANDARD controls the audio matrix when the user has selected the DAC as source (AUD-MXCNT bits[6:4] = 010). In this case it will mute the outputs or select MIN. These functions can be overriden by bits 6 and 7 below. MUTE OV : Mute override, 1 = mute (override AUTOSTANDARD) forces the audio signal to be muted. MONO OV : FM/AM Mono override, 1 = mono (override AUTOSTANDARD) forces can be used to forceto analoguesound. This may be useful in the case of marginal NICAM reception to prevent automatic switching.
AUD-MX-CNT bits[6:4] 010 bit 7 0 X 0 1 1 bit 6 0 1 1 1 0 AO1 source DAC MIN (in case of L/L' standard) FM (in case of B/G or I standard) Muted (in case of B/G or I standard) Muted
: Nicam Un-mute, 1 = unmute allows the NICAM decoder to be unmuted if the bit error rate is higher than the preset limit; this overrides the automatic switching to FM or AM which would normally occur. C4 OV : CBI4 override, 1 => CBI[4] forced to 1 internally is used to override the 4th NICAM control bit (reserve sound switch) if required. This bit is transmitted by the broadcaster to indicate that the analogue sound carrier is a backup of the NICAM signal; this is usually the case. If the NICAM signal fails, the STV8203 will automatically switch to backup sound if the received bit was set to 1. If this bit was set to 0 and bit 4 set to 0, the decoder will stay switched to analogue sound. If bit 4 is set to 1, the received CBI4 is ignored. Note that if automatic standard is off, switching between analogue and NICAM audio must be done manually. STANDARD : Controlthechoiceoftransmissionstandardstobesearchedforbytheautomaticstandardfunction CHECK (standardsearchactive whenbit= 1).The morechoices,thelongerthesearch time. Ifthesystem in use can be identified by the characteristics of the video signal, for example by the chroma demodulator,then only a single bit needs to be set. In this case, the AUTOSTANDARD function willprogramthedemodulatorforthechosenstandard.If no bits areset,the AUTOSTANDARD function is disabled andall registers need to be set manually. bit 3 - Run check for standard 3 (L/L' - AM/NICAM) bit 2 - Run Check for Standard 2 (B/G - FM/NICAM) bit 1 - Run check for standard 1 (B/G - Stereo) bit 0 - Run check for standard 0 (I - FM/NICAM)
UNMUTE
AO-TIMEOUT (AUTOSTANDARD Timer Adjustment) Address : 0F Type : R/W Reset : 1010 0101
bit 7 bit 6 bit 5 TIME 2 SETTING bit 4 bit 3 bit 2 bit 1 TIME 1 SETTING bit 0
Time 1 is used for NICAM and FM mono validation and time 2 for Zweiton. If the standard is not found within this time limit, the next standard will be tried. Time 1 = decimal [bit 3:0] x 32ms. Time 2 = decimal [bit 7:4] x 128ms. Time 1 default value is 160ms. Time 2 default value is 1280ms. A time of 0ms should not be programmed.
20/31
STV8203
PROGRAMMING THE DEVICE (continued)
ZWEITON (Pilot Carrier and Tone Detector Thresholds) Address : 10 Type : R/W Reset : 1000 1000
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 THRESH-SIG THRESH-ST
THRESH-SIG : Pilot Carrier Level Threshold Set the sensitivity for the pilot carrier detector. THRESH-ST : Detected Tone Level Threshold Set the detection threshold level for stereo and dual mono (bi-lingual) tones. Power on default values give a detection threshold corresponding to a modulated pilot carrier S/N of 0dB (700Hz BW) and a S/N of 40dB for the recovered audio.
AGCC (AGC Control for ADC) Address : 11 Type : R/W Reset : 0001 0001
bit 7 AGC-CMD bit 6 0 bit 5 0 bit 4 bit 3 AGC-REF bit 2 bit 1 bit 0 AGC-CST
AGC-CMD : 1 = manual/forced mode, 0 = automatic mode Normally set to 0 enabling automatic mode. In the case of system L/L', due to the presence of the AM sound carrier, the AGC should be switched off. In this case, a fixed gain value should be set using the AGCS register (see below). This bit is controlled by AUTOSTANDARD when this function is activated. AGC-REF : Defines the clipping level. Adjust the allowable proportion of samples at the input of the ADC which will be clipped; the AGC tries to maximise the use of the full scale range of the ADC. The default setting gives a ratio of 1/256.
AGC-REF [4:2] 000 001 010 011 100 101 110 111 Clipping Ratio 1/16 (single carrier) 1/32 1/64 1/128 1/256 1/512 1/1024 1/2048 (multiple carriers)
AGC-CST : AGC time constant between each step of 1.25dB. For a 27MHz XTAL => 00 = 1.21ms, 01 = 2.43ms, 10 = 4.85ms, 11 = 9.7ms. The adjustment is a compromise between settling time and noise immunity.
21/31
STV8203
PROGRAMMING THE DEVICE (continued)
AGCS (AGC Control and Status for ADC) Address : 12 Type : R/W Reset : 0100 00XX
bit 7 0 bit 6 bit 5 bit 4 AGC-ERR bit 3 bit 2 bit 1 SIG-OVR bit 0 SIG-UND
AGC-ERR : Gain Control Signal of amplifier before ADC. There are 32 steps of 1.25dB.
AGC-ERR [6:2] 00000 00001 ..... 11110 11111 Gain (dB) 0 1.25 ..... 37.50 38.75
When AGC_CMD = 0, AGC-ERR can be read thus indicating the input level. It can also be written to thus presetting the AGC level which will then adjust itself to the final value. When AGC_CMD = 1, the AGC is off and thus writing to AGC-ERR directly controls the AGC amplifier gain. Reading AGC_ERR just confirms the fixed value. SIG-OVR : 1 = agc overloaded - signal too BIG SIG-UND 1 = agc under loaded - signal too SMALL When the AGC is in automatic mode (agc_cmd=0), bit 0 indicates if the input signal is too small and bit 1 if the AGC is too big. These bits could be used when setting the input level to the STV8203.
IAGCR (Internal AGC Reference for QPSK) Address : 14 Type : R/W Reset : 1000 1000
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 IAGC-REF
Sets the mean value of the internal AGC, used for QPSK demodulation. The default setting corresponds to half full scale amplitude at the PLL input.
IAGCC (Internal AGC Time Constant for QPSK) Address : 15 Type : R/W Reset : 0000 0011
bit 7 IAGC-OFF bit 6 0 bit 5 0 bit 4 0 bit 3 0 bit 2 bit 1 IAGC-CST bit 0
IAGC-OFF : 1 = Internal agc = off Only enabled when AUTOSTANDARD is off. Normally , the internal AGC should be OFF for FM and ON for QPSK. This bit is controlled by AUTOSTANDARD when this function is activated. IAGC-CST : Internal AGC Programmable Step Constant. Set the internal AGC time constant; the compromise is between fast settling time (for the quickest Nicam identification) and noise immunity. The control range is about 45dB divided into 0.2dB steps. These bits control the time per step (values given for QPSK mode) :
AGC-CST [2:0] 000 001 ..... 111 22/31 Step time (s) 703 352 ..... 5.5 Time Response (ms) 105 53 ..... 0.82
STV8203
PROGRAMMING THE DEVICE (continued)
IAGCS (Internal AGC Control Value) Address : 16 Type :R
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 IAGC-CTRL
Indicates the value of the internal AGC control signal. Normally, the mean value should equal the value set in the IAGCR register when a signal is being demodulated.
FFFIXL (Clock Generator Fine frequency) Address : 17 Type : R/W Reset : 0000 0000
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CLOCK GENERATOR FINE FREQUENCY (8 LSB's)
See FCFIX register for explanation.
FFFIXH (Clock Generator and Fine Frequency Control) Address : 18 Type : R/W Reset : 0110 1110
bit 7 0 bit 6 bit 5 DEMOD MODE M2:M0 bit 4 bit 3 bit 2 bit 1 bit 0 CLOCK GEN FINE FREQ (4 MSB's)
DEMOD MODE M2:M0
: Controls the demodulator mode (only when register Ehex bits[3:0] = 0000) :
MODE[6:4] X00 X01 010 011 110 111 CH1 FM Normal Wide Normal Wide Normal Wide CH2 FM/QPSK FM Normal FM Wide QPSK System B/G/L QPSK System B/G/L QPSK System I QPSK System I
The FM discriminator modulation full range can be set at : - narrow mode : 250kHz ( 125kHz), - wide mode : 500kHz ( 250kHz). CLOCK GEN FINE FREQ : Clock generator fine frequency (4 MSB's) ( see FCFIX for explanation).
FCFIX (Clock Generator Coarse Frequency) Address : 19 Type : R/W Reset : 0001 0001
bit 7 0 bit 6 0 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CLOCK GENERATOR COARSE FREQUENCY
The bits [5:0] together with FFFIXH bits [3:0] and FFFIXL bits [7:0] can be used to programme the internal clock generator for different quartz crystal frequencies ; the default value is for 27MHz. Fref P = 182 - 193 with Fref = crystal frequency, Fqpsk = 32 x 728kHz = 23.296MHz. Fqpsk FCFIX = INT(P) (INT: integer part) FFFIX = 256 x (16 x REM(P) - 1) (REM: fractional remainder) Note that 0 FFFIX <3840 so there is a small range of frequencies which cannot be used. Example : Fref = 27MHz, FCFIX = 17, FFFIX = 3584.
23/31
STV8203
PROGRAMMING THE DEVICE (continued)
CRF2 - CRF1 (FM/QPSK PLL Demodulator Offset) Address : 20-3D Type : R/W Reset : 0000 0000
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 CARRIER RECOVERY FREQUENCY
This register provides access to the instantaneousfrequency of the PLL (2's complement). If written to, it will preset the DCO frequency; if read it provides the instantaneousfrequencyoffset of the PLL's and could be used for an AFC function.
CETH2 - CETH1 (FM Carrier Level Threshold) Address : 21-3E Type : R/W Reset : 0011 0101
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 CARRIER-THRESHOLD
These registers, which perform the same function in channel 1 and channel 2, compare the carrier level in the channel against the threshold value. This level is measured after the channel filter and is relative to the full scale reference level (0dB). This is used as part of the validation of an FM signal, if the carrier level is below the threshold, the signal is considered to be non-valid.
CETH 255 128 64 32 .... 0 Threshold (dB) -6 -12 -18 -24 .... OFF
If CETH is OFF, any carrier level will be accepted. The reset value is 53, it means a threshold of -20dB.
SQTH2- SQTH1 (FM Squelch Threshold) Address : 22-3F Type : R/W Reset : 0011 1100
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 SQUELCH-THRESHOLD
The squelch detector measures the level of high frequencynoise (>40kHz) and comparesit to the threshold SQTH. If the level is below this value, the S/N of the FM signal is considered to be acceptable. Values are given for FM with 50kHz deviation :
SQTH 250 119 60 35 22 S/N (dB) 0 10 15 20 25
The reset value is 60, it means a SNR of 15dB.
24/31
STV8203
PROGRAMMING THE DEVICE (continued) 3.2 - Registers Controllable by Autostandard
FIR2C - FIR1C (FIR Coefficients) Address : 23-24-25-26-27-28-29-2A & 31-32-33-34-35-36-37-38 Type : R/W
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FIR2 or FIR1 COEFFICIENT 0 FIR2 or FIR1 COEFFICIENT 1 FIR2 or FIR1 COEFFICIENT 2 FIR2 or FIR1 COEFFICIENT 3 FIR2 or FIR1 COEFFICIENT 4 FIR2 or FIR1 COEFFICIENT 5 FIR2 or FIR1 COEFFICIENT 6 FIR2 or FIR1 COEFFICIENT 7
Each demodulator channel implements a 16 tap symetric FIR filter, each with 8 coefficients. The following table gives the default values provided by the AUTOSTANDARD function (F = 50kHz in FM mode).
Tap Number 0 1 2 3 4 5 6 7 System I FM/NICAM CH1 CH2 0 0 -2 0 -4 0 -3 0 2 -1 13 4 24 20 31 37 System B/G Zweiton CH1 CH2 0 0 -2 -2 -4 -4 -3 -3 2 2 13 13 24 24 31 31 System B/G FM/NICAM CH1 CH2 0 0 -2 0 -4 -1 -3 3 2 0 13 -12 24 10 31 61 System L/L' AM/NICAM CH1 CH2 0 0 -2 0 -4 -1 -3 3 2 0 13 -12 24 10 31 61
COFQ2 - COFQ1 (DCO Coarse Frequency) Address : 2B-39 Type : R/W Reset : 0000 1100 for COFQ2 - 0000 1011 for COFQ1
bit 7 0 bit 6 0 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANEL 1 DCO COARSE FREQUENCY
See FIFQ1/2 below for explanation.
25/31
STV8203
PROGRAMMING THE DEVICE (continued)
FIFQ2 - FIFQ1 (DCO Fine Frequency) Address : 2C-3A Type : R/W Reset : 1100 0100 for FIFQ2 - 1100 0111 for FIFQ1
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 DCO FINE FREQUENCY (8LSB's)
The DCO's, which are set to the carrier frequencyto be demodulated,are adjusted in two parts as follows : Fc C= 48, where Fc is the carrier frequency, Fs is the crystal frequency Fs Take the nearest integer, Ci, for the 6 bits of the COFQ register 29 F = (C - Ci) 3 Take the nearest integer, Fi, for the 8 bits of the FIFQ register. Common frequencies with Fs = 27MHz :
Fc (MHz) 5.5 5.74 5.85 6.0 6.552 Ci decimal 10 10 10 11 12 binary 001010 001010 001010 001011 001100 decimal -38 35 68 -57 -60 Fi binary 11011010 00100011 01000100 11000111 11000100
ACOEFF2 Address Type Reset
bit 7
ACOEFF1 (PLL Loop Filter Proportional Coefficient) : 2D-3B : R/W : 10010000 for ACOEFF2 - 0010 0011 for ACOEFF1
bit 6 0 bit 5 bit 4 bit 3 SIGN A2 or A1 bit 2 bit 1 FINE A2 or A1 bit 0 COARSE A2 or A1
DMD SW2 or 1
DMD SW : Mode switch : 0 = FM, 1 = QPSK COARSE A, : Program the PLL (FM/QPSK carrier recovery) loop filter proportional coefficient A : SIGNA, FINE A A coefficient = coarse + (sign x fine)
COARSE 00 01 10 11 SIGN 0 1 FINE 000 001 010 011 100 101 110 111 26/31 Value 0 1 1/2 1/4
+ Value 0 1/2 1/4 1/8 1/16 1/32 1/64 Not used
STV8203
PROGRAMMING THE DEVICE (continued)
BCOEFF2 - BCOEFF1 (PLL Loop Filter Integral Coefficient and DCO Gain) Address : 2E-3C Type : R/W Reset : 1010 1100 for BCOEFF2 - 0001 0010 for BCOEFF1
bit 7 SAT SW2 or 1 bit 6 0 bit 5 bit 4 DCO 2 or 1 GAIN bit 3 bit 2 bit 1 B2 or B1 bit 0
SAT SW DCO GAIN
: Saturation Switch : 0 = FM, 1 = QPSK : Programme the gain coefficient (K0) :
DCO [5:3] 000 001 010 011 100 101 110 111 Value 0 1 1/2 1/4 1/8 1/16 1/32 Not used
B
: Programme the PLL (FM/QPSK carrier recovery) loop filter integral coefficient B :
B [2:0] 000 001 010 011 100 101 11X Value 0 1/4 1/8 1/16 1/32 1/64 Not used
27/31
STV8203
PROGRAMMING THE DEVICE (continued)
SCOEFF (Symbol Tracking Loop Filter Coefficients) Address : 2F Type : R/W Reset : 0001 1100
bit 7 DMX-OF bit 6 0 bit 5 bit 4 PLF_A bit 3 bit 2 bit 1 PLF_B bit 0
DMX-OF : Symbol tracking control : 0 = QPSK, 1 = FM. In QPSK mode, the symbol tracking loop is closed. PLF_A : A coefficient (proportional) Programme the symbol tracking loop filter proportional coefficient A :
PLF_A [5:3] 000 001 010 011 100 101 110 111 Value 0 1 2 4 8 16 32 Not used
PLF_B
: B coefficient (integral) Program the symbol tracking loop filter integral coefficient B :
PLF_B [2:0] 000 001 010 011 100 101 110 111 Value 0 1/16 1/32 1/64 1/128 1/256 1/512 1/1024
SRF (Symbol Tracking Loop Frequency) Address : 30 Type : R/W Reset : 0000 0000
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SYMBOL RECOVERY FREQUENCY
This register provides access to the control signal for the symbol tracking loop (2's complement). If read, it indicates a value proportional to the symbol tracking frequency error. If written to, it will preset the frequency error.
SRF [7:0] 10000000 00000000 01111111 Approx. Error (kHz) -8 0 +8
RESET After a reset sequence, all the registers controllable by AUTOSTANDARD function (FIR, COFQ, FIFQ, ACOEFF, BCOEFF, SCOEFF, SRF) are adjusted for the standard I configuration (channel 1 to FM mono mode and channel 2 to QPSK mode).
28/31
STV8203
APPLICATION DIAGRAM (SDIP42 PACKAGE)
U1 C1 10F 100pF SIF1 560 100pF SIF2 L2 10H C28 10F MONO OUT C7 1F MONO IN C8 220nF
8 7 6
C2 10nF
1
STV8203
CAP5 GND2 42
C3 10nF
2
SIF1
DVDD5 41 REG 40 Q1 BC557B C26 220nF C4 10nF
L1 10H
C4 10nF
3
CAP6
C5 10nF
4
SIF2
CAP3 39
3
GND3
NC 38 2 3
MOUT
SCL 37
SCL SDA 5V
MIN
SDA 36
CAP8
NOT USED 35 C10 22pF
39k
C9 1F LIL1 IN C11 1F LIR1 IN
10 LIR1 9
LIL1
XIN 34 R3 22k XTAL (24.712MHz to 27MHz C12 22pF
XOUT 33
11 GND4
GND1 32
C13 1F LIL2 IN C14 1F LIR2 IN C27 10pF
14 CAP2 13 LIR2 12 LIL2
NC 31
NC 30
NC 29
C15 10F
15 CAP1
NC 28
C16 10F AOL1 C17 10F AOR1 C18 1nF
18 CAP4 17 AOR1 16 AOL1
NC 27
NC 26
NC 25 R1 220k C21 100nF 5V C22 10F
C19 10F AOL2 C20 10F AOR2 R2 39 (*) 8V C23 10F C24 220nF
21 AVCC 20 AOR2 19 AOL2
NC 24
RESET 23
CAP7 22
8203-14.EPS
C25 10F
(*) Note : Resistor R2 should be short-circuited in case of 5V only supply voltage application.
29/31
STV8203
PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK DIP
E E1
A1
A2
B
B1
e
L
A
e1 e2
D c E 42 22
.015 0,38 Gage Plane
1
21
SDIP42
e3 e2
Dimensions A A1 A2 B B1 c D E E1 e e1 e2 e3 L
Min. 0.51 3.05 0.36 0.76 0.23 37.85 15.24 12.70
Millimeters Typ.
Max. 5.08 4.57 0.56 1.14 0.38 38.35 16.00 14.48
Min. 0.020 0.120 0.0142 0.030 0.0090 1.490 0.60 0.50
Inches Typ.
Max. 0.200 0.180 0.0220 0.045 0.0150 1.510 0.629 0.570
3.81 0.46 1.02 0.25 38.10 13.72 1.778 15.24
0.150 0.0181 0.040 0.0098 1.5 0.540 0.070 0.60
2.54
3.30
0.10
0.130
30/31
SDIP42.TBL
18.54 1.52 3.56
0.730 0.060 0.140
PMSDIP42.EPS
STV8203
PACKAGE MECHANICAL DATA 44 PINS - FULL PLASTIC QUAD FLAT PACK (TQFP) (THIN)
A A2 44 e A1 34 0,10 mm .004 inch 33
SEATING PLANE
1
11
23
c
12
D3 D1 D
22
L1
L
E3 E1 E
K
GAGE PLANE
Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K
Min. 0.05 1.35 0.30 0.09
Millimeters Typ.
1.40 0.37 12.00 10.00 8.00 0.80 12.00 10.00 8.00 0.60 1.00
Max. 1.60 0.15 1.45 0.40 0.20
Min. 0.002 0.053 0.012 0.004
Inches Typ.
0.055 0.015 0.472 0.394 0.315 0.031 0.472 0.394 0.315 0.024 0.039
Max. 0.063 0.006 0.057 0.016 0.008
0.45
0.75
0.018
0.030
4Y.TBL
0o (Min.), 7o (Max.)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical comp onents in lifesupport devicesor systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - All Rights Reserved Purchase of I C Components of STMicroelectronics, conveys a license under the Philips I C Patent. 2 Rights to use these components in a I C system, is granted provided that the system conforms to 2 the I C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
2 2
31/31
PM-4Y.EPS
0,25 mm .010 inch
B

▲Up To Search▲

Price & Availability of STV8203

	To Download STV8203 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .